answersLogoWhite

0


Best Answer

the last data core for the saucer is at tunguska, when you arrive there keep going to the right and you will see the last data core, good luck finding it.

User Avatar

Wiki User

14y ago
This answer is:
User Avatar

Add your answer:

Earn +20 pts
Q: How do you get the last data core for the saucer in destroy all humans 2?
Write your answer...
Submit
Still have questions?
magnify glass
imp
Related questions

How do you destroy data from an old hard disk?

Either delete it, or physically destroy the disk.


Seismic data indicate that the upper core has differences in temperature What conclusions might be appropriately drawn from that data?

there are convetion curents in the upper core. ^_~


Are computers better data processors than humans?

Are computers better data processors than humans


How does a computer virus destroys the data?

No known viruses destroy data, though many block it.


What are the architectural features of Pentium dual core processor?

High-latency data fetch stalls are hidden by letting the other core issue RAM requests while the first core awaits the requested data.


What is a definition of core data?

Core data is an "object graph" provided to customers by Apple. It allows data to be serialized and manipulated while using "higher level" objects. It was first introduced in the Mac OS 10.4 Tiger.


How do you delete your poke walker data on your poke walker?

destroy your pokewalker


How are route policies applied in the core?

The core must be able to quickly forward data to other parts of the network.


What is a spacecraft that collects data in space but carries no humans?

what spacecraft does not carry humans it gathers data about objects in slace and sends information to Earth


What does the Unix command 'dd' stand for?

dd is an abbreviation for "data definition." It is often jokingly said to stand for "destroy data."


What is the data bus size in Intel core i7?

64 bits


What is the size of the data bus and l1 cache on a core 2 duo CPU?

64 bit data bus and two L1 (64KB) caches; one L1 cache for each core (cpu)