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Reduced Instruction Set Computers (RISC) is a computer chip design strategy/architecture intended to make the CPU chip less complex to design and thereby potentially faster.

Every computer has an inbuilt set of instructions. A set of register patterns that, when detected on the CPU's main register/bus, control how it switches internally. With RISC architecture computers the idea is to simplify the number of possible switching paths that have to be built "internally". This should make the CPU easier to design and increase its throughput. RISC was all the rage in the 1980s - particularly the Sun "SPARC" CPU chips.

[While I am sure that RISC has an important place in CPU design, in effect reducing what the hardware can do for the application programmer in "one" action (instruction), means that the complex tasks that were handled by the hardware have to be coded for by the application (probably inefficiently) - you still need to do them! and I was never convinced that overall, from the user level viewpoint, any real speed advantage was achieved].

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Q: What are Reduced Instruction Set Computers?
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